In the actual application of the circuit, noise and fluctuations are often introduced into the supply voltage unconsciously, thereby affecting the output voltage. In order to make the circuit stable, the generated noise needs to be eliminated or suppressed. Three methods for improving the power supply rejection ratio (PSRR) of the amplifier circuit are discussed in this paper: cascode method, feedback technology, and design of additional circuits that can reduce the influence of the power supply on the output voltage gain. By comparing the simulation data of the three technologies, it can maintain a higher gain value, which is beneficial to the circuit design of the cascade amplifier. The additional circuit can meet the needs of power supply stability.
In practical application of a circuit, noise and fluctuations are often introduced into the power supply voltage unconsciously, thereby affecting the output voltage. For this reason, to stabilize the circuit, these noises must be eliminated or suppressed. For this reason, it is necessary to understand how the noise caused by the supply voltage behaves at the output and how to measure and attenuate the noise that affects the output.
PSRR is a quantitative term for the ability of a circuit to suppress noise from power supplies. It is defined as the ratio of the gain from the input to the output and the gain from the power to the output, ie
Here, A (s) = gain from input to output = Gm & TImes; Rout; Ap (s) = gain from power to output = GMp & TImes; Rout.
therefore
Here, Gm is the input signal transconductance; GMp is the power supply transconductance.
1 Methods to improve PSRR
To reduce the impact of power supply fluctuations on the output, Gm must increase and GMp must decrease. Ideally, to completely rule out the effects of power supply fluctuations, it is necessary to make Gm infinite and GMp zero. The article introduces cascode technology, negative feedback technology and the use of additional circuits. Three methods to improve the PSRR of the amplifier circuit were simulated and verified.
The negative gain that can affect the power supply fluctuation in the reverse direction from VDD to the output terminal improves PSRR, and is reflected to the output terminal of the amplifier circuit. The common source amplifier provides support for the application of this technology, and the results have been confirmed.
2 cascode technology
2.1 Introduction
The cascode technology, although increasing the output impedance Rout of the amplifier, also greatly increases the gain of the amplifier circuit. However, the gain from the power supply VDD to the output is still 1, which is the same as the common source amplifier. In this way, the cascode technology improves PSRR because it increases the gain from the input to the output, while keeping the gain from the power supply to the output constant.
However, compared with the cascode amplifier, the cascode also brings the disadvantages of output swing and 3 dB frequency point reduction. The reduction in output swing is due to the lower requirement for the Vd output swing. As the output capacity increases, the frequency point at the output shifts to the left, resulting in a 3 dB frequency reduction.
2.2 Circuit
The common source circuit is shown in Figure 1. It consists of a PMOS tube as the load, and the PSRR of the amplifier is estimated by the bias circuit of the load MOS tube. A current source of 30 μA is used to bias the amplifier. The gain of this common-source amplifier can be simulated to 3 dB with a frequency of 5.43 MHz and an 8-inch 356. Since the gain AVDD at the power supply is 1, the PSRR is still 356.
The multi-level common source amplifier is shown in Fig. 2, which includes cascode NMOS transistors M1 and M2. The bias voltage of these transistors is generated by the mirror current source and shunted by M1. A current source of 30μA is used to match the bias of the common source amplifier. Although the load device contains only a single-stage MOS, there is no cascade, but the gain of the amplifier is 722, which is twice the original. However, as the output impedance increases, the frequency at the 3 dB point is reduced to 3.57 MHz.
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