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Abstract dsPIc digital signal controller features Ha ISD4002 voice chip; SPl special presentation function and use dsPIC library functions, and gives a simple voice recording circuit. It has the characteristics of low cost, easy to use, etc., and has high practical value.Keywords dsPIC dsPlC30F6014 ISD4002 voice chip
In many applications, voice recording and playback functions, such as repeaters and telephone automatic answering devices, are required. This article introduces a simple and practical dsPIc digital signal controller for voice recording and playback. Due to the powerful digital signal processing function of dsPIC, it can provide subsequent complex processing and so on, and has good scalability.
A brief introduction to the dsPlC series The dsPIC family is a new 16-bit high performance digital signal controller from Microchip. It combines the control advantages of a microcontroller with the high-speed computing features of a digital signal processor (DSP) to provide a single-chip solution for embedded systems. It inherits the Harvard bus structure and reduced instruction set (RISC) technology of the PlC microcontroller series, and has the advantages of simple addressing mode, fast running speed, low power consumption, strong driving capability, etc., and integrates the motherboard-level DSP function to provide Powerful digital signal processing capabilities; in addition, it provides a wide range of peripheral interfaces such as UART, CAN, SPI, etc., which can be easily interconnected with other devices. This article describes the communication control using the SPI interface of the dsPIC digital signal controller and the ISD voice chip. The chip model used is dsPIc30F6014.
2 ISD series voice recording and playback chip ISD series voice chip is the product launched by American ISD company. This series of chips adopts the patented technology of multi-level direct analog memory (Chip Corder), the sound does not need A/D conversion and compression, each sample is directly stored in the on-chip flash memory, avoiding the error of A/D conversion; Really and naturally restore voice, music and sound effects; avoid quantization noise and metal sound caused by quantization and compression of general solid-state recording circuits. The ISD4000 series uses CM0s technology, including crystal oscillator, anti-aliasing filter, smoothing filter, automatic squelch, audio power amplifier and high-density multi-level flash memory array. It requires only a few peripheral components. A complete voice recording and playback system. Its operation commands are sent through the serial communication interface (SPI) or Microwire; the sampling frequency can be 4.O Hz, 5.3 Hz, 6.4 Hz, 8.O Hz, the lower the frequency, the longer the recording and playback time, but the sound quality will be The information is stored in the flash memory, can be stored for 100 years (typical value) in the case of power failure, repeated recording 100,000 times; device operating voltage 3 v, operating current 25 ~ 30 mA, good sound quality, suitable for Mobile phones and other portable electronic products. The chip model used in this design is ISD4002, and the single-chip recording and playback time is 120 s.
3 SPI interface introduction
   SPI is a synchronous serial transmission specification introduced by Motorola, USA, and is often used as a serial extension interface for microcontroller peripheral chips. The SPI has four pins: SS (slave select line), SDO (serial data output line), SDI (serial data input line), and SCK (synchronous serial clock line). The SPI can simultaneously transmit and receive 8 (16) bits of data in full-duplex communication. The process is as follows: the host initiates the transmission process, sends out the clock pulse signal, and the data of the main shift register is shifted into the slave shift register through SDO, while moving. The data in the bit register is shifted to the main shift register by SDI. After 8 (16) clock pulses, the clock is paused, and the 8 (16) bits of data in the main shift register are all transferred to the slave shift register, which is then automatically loaded into the slave receive buffer, and the slave receives the buffer. The device full flag bit (BF) and the interrupt flag bit (SSPIF) are set to "1". Similarly, all 8 bits of data from the shift register are moved into the main register and then automatically loaded into the main receive buffer. The main receive buffer full flag bit (BF) and the interrupt flag bit (SSPIF) are set to "1". After the main CPU detects the full flag of the main receive buffer or the interrupt flag bit is set, the data in the receive buffer can be read. Similarly, after the CPU detects that the receive buffer full flag bit or the interrupt flag bit is set, the data in the receive buffer can be read, thus completing a mutual communication process. Here, the dsPIC30F6014 is set as the master controller, and the ISD4002 is the slave device, and the communication control process is completed through the SPI port.
4 dsPIC SPI function library
   The dsPIC30F6014 provides two SPI interface modules, each of which includes three special function registers and four pins. SPIxBUF is the data buffer register. It should be noted that the receive buffer SPIxRBF and the transmit buffer SPIxTBF share the same address, ie they are all mapped to SPIxBUF. In other words, when the receive or transmit buffer registers are operated, only SPIxBUF can be operated, and SPIxRBF or SPIxTBF cannot be operated directly. SPIxCON is a control register that is used to configure the operating mode of the sPI module. SPIxSTAT is a status register that indicates the state of the SPI module. Its module block diagram is shown in Figure 1.
By configuring the control registers, the SPI module can be set to 8-bit or 16-bit mode, main mode or slave mode, frame synchronization and other operating modes. Clock edges, clock division multiples, etc. can also be configured. Here, a master-slave mode in which dsPIC is dominant and ISD is slave is used. The peripheral interface library provided by Microchip makes this configuration work easy.
dsPIC Language Tools Libraries is a set of tools provided by MictoChip to developers, including three sub-libraries. The DSP library provides commonly used DSP functions; the peripheral interface library provides driver functions for all peripheral interfaces of the dsPIC family, including the SPI interface; the standard C and math function libraries are available for download from Microchip's official website (). We can use the SPI library function in the peripheral interface library. The SPI library mainly includes the following functions:
1configIntSPIx SPI interrupt configuration function. This function configures the interrupt enable bit and interrupt priority of the sPI interface, and the return value is null.
2CloseSPlx closes the SPI interface.
3DataRdySPlx SPl interface data is ready. This function is used to determine if there is data waiting to be read in the SPI receive buffer. If the return value is 1, it means that the data in the buffer is ready, waiting for reading; if the return value is 0, the marked buffer is empty.
4ReadSPIx reads the SPI interface buffer.
5WriteSPIx sends a buffer write data to the SPI interface.
6OpenSPIx opens the SPI interface. This function contains 2 parameters: configl and config2. Configl contains configuration information for the SPI interface operating mode, which will be written to the control register; config2 contains the status information of the SPI and will be written to the status register. This function completes the configuration of the SPI interface while it is open.
The 7puasSPIx function writes a string of data to the send buffer.
The 8getsSPIx function reads the string data of the specified length from the receive buffer and dumps it to the specified space.
In addition to these eight functions, the library also provides the corresponding macros to perform the same functions, which can be easily used in the program.
5 lSD4002
The ISD4002 operates on the SPI serial interface. The SPI protocol is a synchronous serial data transfer protocol that assumes that the microcontroller's SPI shift register operates on the falling edge of SCLK. For the ISD4002, the MOSI pin data is latched on the rising edge of the clock. Save the falling edge to send data to the MISO pin. The details of the agreement are as follows:
1 All serial data transmission starts at the falling edge of SS;
2SS must be held low during the transfer and held high between the two instructions;
3 data is shifted in on the rising edge of the clock and shifted out on the falling edge;
4SS goes low, ISD will start recording and playback after inputting the command and address;
5 instruction format is a 10-bit address code plus a 6-bit control code;
Any operation of 6ISD (including fast forward) generates an interrupt if it encounters EOM or OVF, and the interrupt status is cleared at the beginning of the next SPI cycle;
7 When the read command is used to shift the interrupt status to the MISO pin of the ISD, the control and address data are also shifted in from the MOSI.
8 All operations start when the run bit (RUN) is set to 1, and end when set to 0;
9 All instructions are executed on the rising edge of SS.
Its timing is shown in Figure 2.
For the ISD4002, the device delays TPUD (about 25 ms at 8 kHz sampling) before starting operation; therefore, after the user has finished issuing a power-up command, it must wait for TPUD to issue an operation command. The following is a typical operation.
To pronounce from 00, the following sequence should be followed:
Send a POWERUP command;
Waiting for TPUD (power-on delay);
Send an SFTPLAY command with an address value of 00;
Send a PLAY command.
The device will start playing from the 00 address. When the EOM appears, it will be interrupted immediately and the playback will stop.
If recording from 00, press the following sequence;
Send a POWER UP command;
Waiting for TPUD (power-on delay);
Send POWER UP command Wait 2 times TPUD;
Send a SETREC command with an address value of 00;
Send a REC command.
The device starts recording from the 00 address and stops recording until OVF (end of memory) appears. Its working sequence is shown in Figure 3.
6 Circuit Design This circuit uses the dsPICC30F6014 digital signal controller to control the movement of the ISD4002 recording and playback chip through three button switches. S1, S2, and S3 are respectively connected to the controller external interrupts INT1, INT2, and INT3. When S1 is pressed, recording starts, and when S1 is pressed again, recording stops. This can be done in multiple steps. Similarly, when S2 is pressed, playback starts, and when S2 is pressed again, playback is stopped. Play multiple recordings in this order. Press S3 to shut down.
(1) Hardware circuit design The circuit principle is shown in Figure 4. The whole circuit is composed of a voice recording and playback circuit, a microphone input circuit, a key switch circuit and an LCD display circuit. Since the output of the design directly drives the ordinary earphone, the external power amplifier circuit is not required for the experiment, and the output of the internal power amplifier of the ISD4002 can be directly used. ISD4002 as a slave, its SPI interface MOSI is connected to the controller's SDO; MISO is connected to the controller's SDI; SCLK is connected to SCK; SS is connected to the controller's SS. LCD is used for interface display of human-computer interaction.
(2) The software design program includes the main program and several subprograms. In the main program, after completing the initialization work, enter a while loop, wait for the interrupt triggered by the response button, if there is a button press, enter the corresponding interrupt service program. In the interrupt service program of the button S1, a flag variable is set, and each time the Sl is pressed, the flag variable is inverted to control the recording and stop the recording. Similarly, a flag variable is also set in the interrupt service program of S2, and the control starts to play and stop playing. The S3 interrupt service routine sends a Power-Down command to shut down. The main program and the interrupt service program are given in the program list, including the LCD driver and the SPI function library of dsPIC. (Editor's Note: The source program can be found on the website )
7 Summary <br> This circuit is easy to implement, simple and practical, and has good scalability; the output sound is clear and natural. If you want to increase the recording time, you can use other chips of the ISD4000 series, the program is basically the same. In addition, there are several things to note during the design process:
1 In the data transmission of SPI, the transmission order defined by different chips may be different, so it is necessary to pay attention to whether the high bit is transmitted first or the low bit is transmitted first. ISD4002 requires high-order data to be transmitted first. If it is opposite to the order defined by the main chip, it is only necessary to reverse the instruction code.
2 Because ISD4002 requires data to be placed on the transmission line in the first half of the clock, SPI initialization needs to be taken into account when using the dsPIC SPI library. In this design, the configuration used is SP1 - CKE - ON & CLK_P0L_ACTIVE_HIGH.
The above two points may help solve some common problems.
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